The Agilent 16753A state and timing analysis module delivers the performance and capabilities you need to debug and validate digital systems using the new high-speed system interconnects and buses of today.
The innovative "eye scan" mode in the 16753A enables you to examine eye diagrams on multiple circuit nodes simultaneously, for a rapid, comprehensive view of signal integrity.
Another feature, "eye finder," automatically adjusts the position of the data valid window on every channel independently, ensuring the most reliable data capture on high-speed interconnects and buses.