|- Agilent 93000 P600 SoC Test System||Call|
|- Agilent 93000 P1000 SoC Test System, 112 pins, small test head||Call|
|- Agilent 93000 P1000 SoC Test System, 512 pins, 28 Meg LVM||Call|
|- Agilent 93000 PS800 SoC Test System||Call|
|Agilent HP 93000||Call|
Note: Sold by Verigy as of June 2006.
The new Agilent 93000 14-bit, 100 MHz Digitizer is the first test solution to meet the emerging performance requirements driven by DOCSIS 2.0 and HDTV. Superior performance in both total harmonic distortion (THD) and spurious free dynamic range (SFDR) enables accurate testing of new high data rate communication applications such as STBs and Cable modems.
The Agilent 93000 is a leader in the industry in providing a low noise floor, which dramatically reduces the number of data averages required for optimal dynamic range. The superior performance capabilities of the 14-bit 100 MHz Digitizer together with the low noise floor reduces test time and increases throughput. The new Agilent 100 MHz 14-bit Digitizer provides high performance, high accuracy testing for up to 12-bit DACs.
Superior performance Two independent paths are carefully designed to optimize digitizer performance from DC to 100 MHz, which produces the industry best SFDR. The DC path SFDR is optimized for the lower VHF side, while the AC path SFDR is optimized for the higher VHF side. For example, for Cable-STB device testing, the DC path is designed for high definition video DAC, while the AC path is designed for up-stream DAC testing. Additionally, the digitizer sample rate extends to 105 Msps and has 16 Mbyte waveform memory for real-time data accumulation to capture wider bandwidth signals.
The 14-Bit 100 MHz Digitizer is software and pogo-pin compatible with Agilent existing 12-bit VHF Digitizer.
Reduced test time produces high throughput The low noise floor, a characteristic of the Agilent 93000, speeds test time by reducing the amount of data averaging required. This, combined with the 93000 unique Cycle Steal Upload capability (parallel execution of measurement and data upload), contribute to test time reduction and faster throughput.