Timing and State Module, 34 channels, 800 MHz, 64M MEM
Timing analysis (asynchronous sampling):
800 MHz / 800 MHz (half / full-channel) conventional timing with deep memory
400 MHz transitional timing
State analysis (synchronous sampling):
State clock rates up to 800 Mb/s (full channel), 1.5Gb/s (half channel)
Data rates: up to 1.5 Gb/s
Automated threshold/sample position setup for accurate measurements on high-speed buses
Simultaneous eye diagrams on all channels identify problem signals quickly
Configuration considerations:
34-channels per module, up to 170 channels in single time base with 5 modules combined
Selectable memory depths: 64 M (standard)
Compatible with 90-pin logic analyzer probes (probes separately available)
Compatible with 16900 Series modular logic analyzers
Additional capabilities:
Comprehensive single-ended and differential signal support, threshold is adjustable from -3 V to 5 V (10 mV increments)
€ 4,000 $4,800 (US)