A logic analyzer is an electronic testing device that is used to test, diagnose and display signal timing within a digital circuit. Logic analyzers are designed to audit performance within a given system via multiple digital lines simultaneously. The device is connected to the digital system being tested with a series of electronic probes. Data is captured by the probes and then analyzed by software integrated in the device.
Clock rate refers to a mode to which a logic analyzing device is set during a test. It determines the sampling type and rate, and relates directly to timing speed and state speed. Clock rate plays a critical role in the resolution of the data acquired during sampling.
Differential signalling is a method of electronic signal transmission that utilizes two corresponding signals along a path created by two separate wires. It is most suitably used with low voltage electronic systems. Use of this method reduces the risk of error caused by electromagnetic interference experienced with other transmission methods.
Glitch triggering is a trigger option available on most logic analyzing devices. This feature allows the user of the device to trigger on any digital pulse, even if it is longer or shorter than the predefined limit. Because it allows for triggering with more precision, this option is helpful in detecting glitches that are rare and traditionally more difficult to diagnose.
Memory depth, often called record depth, is an important timing zoom specification. Memory depth is a critical factor of consideration when selecting a logic analyzer, as it determines the device's capacity to acquire timing. As the sample rate is increased, total acquisition time is decreased. A device with deeper memory capacity is more apt to detect both an error and the flaw within the system under test that initially caused the error. This is due to the fact that an error may be detected after its fault becomes apparent. Stored data helps to more precisely pinpoint causal faults, regardless of their occurrence in relation to the error.
Sample rate refers to the rate at which data is sampled by a logic analyzer. It is determined using either timing clock mode or state clock mode, depending on the measurements being taken. Sample timing analysis helps to reveal intermittent timing flaws that may occur during a test.
Single-ended signalling is a common and popularly used transmission method used to convey electromagnetic signals over fibers or wires. In single-ended signalling, the signal is transmitted using a sole conductor and assigned to an analog ground. Single-ended inputs usually convey high voltage signals over short distances.
State Clock or State Speed
In a logic analyzer, there are two different types of data acquisition. These are referred to as clock modes, and include timing clock mode and state clock mode. State clock mode determines state speed in the system under test. State speed refers to the rate at which a logic analyzing device captures states within a test conducted during a specified amount of time. A "state" pertains to the characteristic node of the system in which it waits, anticipating a transition-inducing trigger. The logic analyzer is set to "state" mode, the number of states captured during the test is measured and the resulting measurement is referred to as the state speed (measured in MHz).
Timing Clock or Timing Speed
In a logic analyzer, there are two different types of data acquisition. These are referred to as clock modes, and include timing clock mode and state clock mode. Timing clock mode is used to acquire signal timing data. The logic analyzer's internal clock is used to sample data and the device's software is then used to analyze it. The faster the information is sampled, the higher the timing resolution will be. The timing speed is measured in MHz.
The timing resolution of a logic analyzer refers to the device's clock frequency while running in its asynchronous mode. The higher speed of the timing resolution, the more effectively the user of a logic analyzing device will be able to detect bugs or other issues during a test. A high timing resolution allows for more easily and quickly detected glitches, resulting in a more precise triggering action and more accurate data sampling.
Timing zoom is a feature on a logic analyzing device used to measure the width of an electronic pulse during a test. It increases the conventional time sampling rate by approximately eight to ten times. It offers refined resolution, concurrent state and timing measurements and provides more information than traditional logic analyzer settings.
An event that occurs at a specific moment of interest during a logic analyzer's testing. The triggering results in a pause or termination of the test, at which point the logic analyzer's software receives a transmission of the data collected during the test. The trigger can be set to stop the test directly before a specified error occurs in order to determine the cause of the failure within the system.